The present invention relates to a non-volatile memory.
Large-scale integrated semiconductor memories are provided with redundant circuitry for remedying defectiveness. The same is applied to electrically-erasable (rewritable) non-volatile memories (EEPROM).
Well-known redundant circuitry has redundant raw and column cell arrays to a memory cell array and a fuse circuit for storing addresses at which defective memory cells are located (called defective addresses hereinafter). Such a fuse circuit mostly consists of laser-brown type fuses.
Defective addresses for defective cells detected in a wafer test are programmed onto a fuse circuit. Once the fuse circuit has been programmed, an input detective address is compared with the defective addresses stored in the fuse circuit. If they are met, a replacement control is performed such that a decoder is controlled to select a redundant cell in place of the defective cell.
In addition to storing address data for a remedy for defectiveness as described above, the fuse circuit stores several initially-setting data for deciding memory operation requirements. The initially-setting data includes adjustment data to chip internal voltages that vary among chips or wafers, setting data for data-programming voltage, control parameters for the number of loops for programming (writing) and erasing, and so on.
The fuse circuit, however, cannot be reprogrammed. Moreover, defective cell detection by a tester in a wafer test and laser-fuse blowing are different processes so that they cannot be performed as a sequential process.
In place of such a fuse circuit, an electrically-erasable non-volatile memory cell the same as a memory cell for an EEPROM has been proposed as an initially-setting data storing circuit because such a non-volatile memory cell can easily program data compared to a fuse blowing and is data-rewritable.
However, proposed so far is a system in which a non-volatile memory cell array for storing initially-setting data is provided separately from a data-storing memory cell array. Such a system thus requires circuitry especially for reading data from, programming data to and erasing data in a memory cell array for storing initially-setting data other than that for a data-storing memory cell array. This results in complex circuitry, an increase in chip area and also complex control for data verification and reprogramming, etc.